Two Iterative Metaheuristic Approaches to Dynamic Memory Allocation for Embedded Systems

Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant impact on power consumption, this paper addresses dynamic memory allocation for embedded systems with a special emphasis on time performance. In this work, time is split into time intervals, into which the application to be implemented by the embedded system requires accessing to data structures. The proposed iterative metaheuristics aim at determining which data structure should be stored in cache memory at each time interval in order to minimize reallocation and conflict costs. These approaches take advantage of metaheuristics previously designed for a static memory allocation problem.